Software emulator of the digital processor training model

Keywords: software emulator, computer modeling, algorithmic model, digital processor, user interface, educational process

Abstract

     The paper deals with the problems of organizing practical and laboratory work in the educational process in higher educational institutions of Ukraine in the context of distance learning. The reason for these problems is the lack of the possibility of conducting classroom classes with the use of appropriate visual equipment and laboratory equipment in the current conditions. The development and creation of software emulators and interactive learning applications is considered as one of the possible methods of solving this issue.

     The purpose of the work is to improve the quality of the educational process in the study of the basics of microprocessor technology through the development and use of a computer model of a learning processor.

     The article provides a brief review and analysis of existing samples of software emulators of digital processors that work independently or as part of integrated software development environments, identifies their shortcomings in relation to the use in the educational process, proposes a new approach to design and software implementation, and formulates the main technical requirements for a computer model. The structure of the created software application and its user interface are considered, and the features of the software implementation are described. The main difference between the created emulator and existing analogues is an extended graphical representation of the internal structure of the processor, as well as animated indication of signals and processes occurring during its operation.

     The software implemented computer model allows executing a program placed in virtual memory in one of three modes. The first mode provides step-by-step execution of commands, clearly demonstrating with the help of graphical means the formation of internal processor control signals and changes in the states of its individual nodes throughout the entire machine cycle. The second mode allows you to gradually execute the program one command at a time, displaying the processor status only after each command is completed. The third mode is designed for automatic continuous program execution at a preset speed.

     The results of testing and trial operation of the created emulator within the framework of distance learning at the Faculty of Computer Science of V. N. Karazin Kharkiv National University are also presented.

     The results are summarized and the prospects for further improvement and expansion of the possibilities of using this model in the educational process are considered.

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Author Biographies

Reva Sergiy, V. N. Karazin National University, Svobody Sq 6, Kharkiv, Ukraine, 61022

Candidate of Technical Science, Associate Professor of the Department of Electronics and Control Systems, Faculty of Computer Science

Vladislav Komerystyi, V.N. Karazin National University, Svobody Sq 6, Kharkiv, Ukraine, 61022

bachelor student

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References

Published
2023-06-26
How to Cite
Sergiy, R., & Komerystyi, V. (2023). Software emulator of the digital processor training model. Bulletin of V.N. Karazin Kharkiv National University, Series «Mathematical Modeling. Information Technology. Automated Control Systems», 58, 54-63. https://doi.org/10.26565/2304-6201-2023-58-06
Section
Статті