TCAD-Based Capacitance Analysis for Identifying Longitudinally Localized Oxide-Trapped Charge in SOI FinFETS

Keywords: SOI FinFET, Oxide trapped charge, Gate-source capacitance, Gate-drain capacitance, Charge distribution, TCAD simulation

Abstract

This study examines the effect of the spatial position of locally trapped oxide charge on the gate-to-source and gate-to-drain capacitances of an SOI FinFET using three-dimensional TCAD Sentaurus simulations. The results reveal that the location of the trapped charge strongly influences the gate-to-source capacitance via charge-carrier redistribution near the channel surface, whereas a distinct response is observed when the trapped charge is near the oxide edge. Moreover, the gate-drain-to-gate-source capacitance ratio varies systematically with the trapped-charge position along the channel, suggesting that this parameter can serve as a reliable electrical indicator for detecting oxide-trapped charge and estimating its spatial distribution in FinFET devices.

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Published
2026-09-07
Cited
How to Cite
Foziljonov, M., ErgashevB. М., Yunusaliyev, N. Y., Norbutayev, M., & Orinboyeva, K. (2026). TCAD-Based Capacitance Analysis for Identifying Longitudinally Localized Oxide-Trapped Charge in SOI FinFETS. East European Journal of Physics, (3), 286-291. https://doi.org/10.26565/2312-4334-2026-3-23

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