AN AB INITIO CALCULATIONS OF SINGLE-ELECTRON TRANSISTOR BASED SINGLE WALLED CARBON NANOTUBE OF ULTRA-SMALL DIAMETER

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Carbon nanotubes have been known to show astonishing electrical properties; therefore could be used in electronic industry as a future alternative for Silicon based devices.Over the last few decades, the advancement in the speed, complexity and low power consumption of electronic devices, have been dramatically developed and achieved by decreasing the device dimensions and evolving new device structures.Since the objective of modern technology is to reduce the size of the devices; therefore the researchers as well as the engineers have been inclined towards Nano electronics.In decreasing the size of the transistor, scaling has always played an important character to observe Moore's law [1]; but the decrement in the size of a device leads to the drooping of device.Drain-induced barrier lowering, threshold voltage shift, leakage current, gate-induced drain lowering etc., are the effects, named as short channel effects, which become prominently dominant when device size is decreased [2].To reduce, these effects and to increase device performance, the researchers have done many research and Single-electron transistors are one of them.A Singleelectron transistor [3][4][5][6] (SET) is an electronic tool system by which the flow of even a single electron can be governed.
Carbon nanotubes [7][8][9] are the nanostructures of high aspect ratio; also they used to show excellent electronic, thermal, mechanical, structural properties [10] so could be used in electronic devices.Depending upon the type of rolling, nanotubes may exhibit semiconducting or metallic nature.CNTs have been investigated since a very long time and being used in electronic devices such as in field effect transistors (FETs) [11,12], but in FETs the flow of current occurs due to the tunneling of many electrons through the junctions.While if instead of many electrons, the flow of only single electron may cause the current flow, then the circuit power consumption and probability of high switching can be achieved [13].Low power consumption and sensitivity of SETs make it a good candidate for VLSI technologies [14].In spite of being the low temperature phenomenon, the room temperature fabrication of SETs has been executed [15].In this paper, we have studied the single walled carbon nanotube, of ultra-small diameter and zigzag type, incorporated in the single electron transistor.In this study we had used the zigzag nanotube of ultra-small diameter (4,0) in single electron transistor.The conductance as well as the charge stability diagram (CSD) of the device had been studied.

THEORY, RESULTS AND DISCUSSION
In the present work, theoretical calculations based on Density Functional Theory (DFT) were done to calculate the above said quantities.In order to do the calculations the single electron transistor was modeled by using density functional theory based software Atomistic toolkit (ATK) [16] package by which all the modeling and the analysis of the device had been carried out.Local Density Approximation (LDA) [17] was chosen as the exchange-correlation function.The gate electrode thickness, gate-oxide (dielectric constant of material ϵο = 10) [18] thickness and the sourcedrain width are considered to be 1A°, 3.8A° and 4A° in order to design the SET.Source/drain electrodes were taken as metallic electrodes of 5.28 eV work function i.e., gold [19].Normal components of electric field had been set to be zero using Neumann boundary conditions for device analysis.Also, in the molecular energy spectrum the energy was set to absolute energy.As in the Fig. 1 (a) it can be seen that a single-electron transistor was assembled by placing an island in An Ab Initio Calculations of Single-Electron Transistor Based Single Walled Carbon...

EEJP. 2 (2020)
between the two electrodes named as source (left) and drain (right) respectively.The island is isolated from the third electrode (gate), source and drain electrodes by an ultra-thin dielectric material.The third terminal gate is capacitively coupled to the conducting island.Two junctions source-material and material-drain have been observed which are necessary to be crossed in order to maintain the current flow in the device.The source was kept at higher potential as compared to the drain electrode.An electron will tunnel from the source to the material until or unless its energy becomes equal to the coulomb's energy and till then electron will be trapped onto the barrier [20][21][22][23].This phenomenon of trapping the electron is called as the coulomb blockade by which the flow of electron can be controlled.Gate voltage is the main key controller of SET.Using the DFT based ATK-VNL simulation package we have optimized CNT (4,0), which was the basic need in order to design SET.From the optimized structure, CNT was modeled in the SET configuration using the software with local density approximations (LDA).The modeled structure has been shown in Fig. 1 (b) in which the nanotube was kept just above the dielectric material, which was connected to gate electrode, and metallic electrodes surround the system.
After the completion of the modeling the structure, the SET configuration was used to calculate charge stability diagram (CSD), also against the gate voltage the variation of total energies have been observed.First, we have calculated the total energies in isolated state and then for SET environment for individual charge states (0, 1, 2,-1,-2) that are required to calculate the charging energies i.e. electron affinity (E A ) and ionization energy (E I ).Both of these can be defined as the amount of energy required adding one electron to the molecule and the amount of energy required to eliminate one electron from the molecule respectively.
In the equation form these can be written as: Where E is the energy of the molecule in neutral state, E -1 is the energy of the molecule when one electron is added to the molecule, and E +1 is the energy of the molecule after the elimination of one electron.
The energies have been calculated in both the configurations and shown in the table 1.It has been found that there is a reduction in electron affinity (E A ) and in ionization energy (E I ) in SET environment, which may due to the stabilization of charges due to electrostatic surrounding.This reduction enhances the switching property of device since as the energies become lower; the switching speed as well as the conductance will be improved.By addition energy the conductance improvement can be further explained since E add = E A -E I ; shown in table 2. It is clear that in SET environment the addition energy is lower; which is indicating the better stability of the system.For distinct charge states the variation of total energies with respect to gate voltage has shown in Fig. 2(a); in which different color map shows different charge states i.e. blue (-2), green (-1), red (0), turquoise (1), and violet (2). Figure 2(a) shows that the system has minimum energy in its neutral state i.e. in 0 charge state.Since minimum energy EEJP. 2 (2020) Sraja Chauhan, Ajay Singh Verma expresses the stability of the system so the system is stable in its neutral state.Also it can be seen from the figure that when the negative bias is applied then positive states are getting stable and when the positive bias is applied then the negative charge states are getting stable.This indicates that whenever the gate is positively biased then an electron is attracted towards CNT and making it negatively charged as a result the LUMO level of CNT appears to be lower than that of electrode's Fermi level.While on the other hand, when the gate is negatively biased then an electron is eliminated from the CNT and making it positively charged and HOMO level of CNT appears to be above the electrode's Fermi level.Charge stability diagram (CSD) has been plotted for the investigation of conductance and shown in fig.2(b).CSD explains the dependence of conductance on the source drain and gate voltage.In this diagram the charging energy of CNT in SET surroundings is plotted for different gate voltages.A particular number of energy levels i.e. charge states are present there for a fixed value of source-drain and gate voltage.Different energy levels are represented by a coding of different colors i.e. blue (0), light blue (1), green (2), orange (3) and red (4) in CSD and conductance depends upon the number of charge states in bias window.As much as the width of the central dark region decreases, less the charging energy will be needed to bring SET into conduction state.From the figure, it is clear that the central dark blue region is not much broad therefore the device will be needed less energy to bring SET in conduction state and the device can act as a fast switching device.

CONCLUSIONS
The present work validates the application of Density Functional Theory (DFT) to calculate the properties of carbon nanotube (CNT) based single electron transistor (SET) in Coulomb blockade regime.Single-electron transistor with island CNT of (4,0) configuration had been modeled and simulated.It shows better stability and higher conductance.With the help of Charge stability diagram (CSD) and variation of total energies with respect of gate voltages at different charge states the system shows high conductance.

Figure 1 .
Figure 1.(a) Structure of conventional Single Electron Transistor, (b) the modeled structure of CNT (4,0) based Single Electron Transistor

Table 1
Calculated values of electron affinity and ionization energies in isolated and in SET configuration

Table 2
Calculated values of addition energies in both the environments